EDN Design Ideas (DI) published a design of mine in May of 2025 for a passive two-way current mirror topology that, in analogy to optical two-way mirrors, can reflect or transmit. That design ...
Figure 1 Incoming 8-bit antilog PWM interface (U1, U2, A1, Q1) generates 80 nA to 8 mA current to control 10 Hz to 1 MHz ...